Large Area Processing Chip Embedded Micro-fluid Cooling Technology

Since the semiconductor integrated circuit came into being in the late 1950s, it has been developing rapidly in the direction of small size, high speed and high memory. Under the guidance of Moore's Law, the feature size of silicon-based chips is continuously reduced and the number of transistors is constantly increased. In 2020,TSMC achieved the minimum chip feature size of 5 nm in mass production, and in 2022, Apple's M1 Ultra chip integrated 114 billion transistors. Figure 1 shows the number of transistors in a chip from 1970 to 2022.

For a long time in the development of integrated circuits, Moore's Law was developed in accordance with Dennard's scaling law. In each generation of technology, transistor density doubles and transistor power consumption per unit area remains constant. Thus, the power density of the chip remains constant. However,Dennard's law of scaling has slowed down considerably since 2007. Near failure around 2012. Because the gate length of transistor is getting smaller and smaller in advanced manufacturing process, the leakage phenomenon is getting more and more serious, which makes the chip in the production of smaller technology, the power consumption is not reduced but increased. This brings serious heat dissipation problems. Figure 2 shows the development trend of chip clock frequency and thermal design power value over time. With the reduction of process nodes and the increase of clock frequency, the thermal design power of the chip is increasing.

Heat dissipation is critical to chip performance and reliability. If the heat cannot be effectively dissipated, the chip temperature will continue to rise, resulting in an increase in the leakage current of the device. The threshold voltage decreases, affecting the chip performance. With the increase of temperature, the failure rate of electronic components and equipment increases exponentially. The stability and reliability of electronic devices are strongly affected by temperature, so breakthroughs in high-performance electronic systems increasingly depend on the ability to safely dissipate excess heat. In particular, chip heat dissipation is increasingly required in applications such as servers, data centers, and super-computing centers that work continuously throughout the year.

At present, high performance processing chips generally use Flip Chip (FC) package form. Its structure is shown in Figure 3. The heat dissipation path under the chip goes through low thermal conductivity materials such as bottom fillers and plates. The lower part of the chip has high thermal resistance, and the chip mainly relies on the upper part of the structure for heat dissipation. There are three main thermal resistance in the heat dissipation path above the chip, including the heat conduction resistance from the transistor to the shell, the heat conduction resistance from the shell to the heat sink surface, and the heat sink and the convection heat transfer resistance of the external environment. Moreover, the assembly of shell and heat sink requires Thermal Interface Material (TIM) to improve the heat conduction path between rough surfaces. Therefore, multiple interface thermal resistance is introduced.

The earliest recessed runner design stems from work carried out by D. B. Tuckerman and R. F. W. Pease in 1981. In order to increase the convective heat transfer coefficient, they reduced the channel width to 50 µm, corroded the silicon groove with specific crystal orientation with KOH, and formed a closed channel using the silica-glass anode bonding process. The micro-channel structure is shown in Figure 4. When the flow rate was 600 mL/min and the pressure drop was 216 kPa, deionized water was used as the coolant to cool the chip with an area of 1×1 cm2. The maximum heat flux of the heat source reaches 790 W/cm2. The thermal resistance is about 0.1 K·cm 2 /W.

Due to the simple structure of through-channels, the early embedded microfluidic heat sink was studied on parallel through-channels. The optimization scheme includes theoretical approximate analysis, multi-parameter scanning, search algorithm and so on. Some scholars also studied the difference between the flow and thermal characteristics of microfluidics and conventional fluids, which laid a theoretical foundation for the follow-up analysis of heat dissipation of microfluidics.

Since then, scholars have proposed a variety of discontinuous fin structures for embedded microfluid cooling, including inclined fins, microcolumn fins, triangular fins, etc., as well as some special fin structures, including waveform microchannels, piranha fins, etc.

In addition, large area chips require larger flows to maintain the same temperature rise, as shown in Figure 5. As the area of heat source chip increases, the maximum thermal resistance will increase. When the heat source area is 1 cm2, the limiting heat flux is 200 W/cm2, and when the heat source area is increased to 4 cm2, the limiting heat flux decreases to 100 W/cm2. As the chip area increases, the spoiler is not a sustainable thermal design solution.

Due to the long flow distance of the fluid in the DC channel, the flow resistance is generally larger, especially after the addition of other enhanced heat transfer structures, resulting in further increase of the flow resistance. In addition, due to the low average Nusselt number and the obvious temperature rise of the fluid, the heat dissipation capacity of the straight channel can only reach about 400 W/cm2.

In order to obtain the optimal heat dissipation performance, subsequent scholars conducted a lot of research and analysis on the key dimensions of the microcolumn structure, including the shape, radius, position, number and other parameters of the microcolumn to optimize the heat dissipation performance of the chip.

Two defects of the conventional through-passage are considered: large pressure drop and significant temperature rise along the flow direction. In order to reduce the thermal resistance caused by the heating of cooling medium, it is necessary to increase the flow rate. The flow can be increased by increasing the number of parallel channels and shortening the flow length without increasing the pressure drop.

Some scholars have proposed an ultra-thin radiator that can realize efficient cooling, combined with the cooling mode of jet and manifold channel, as shown in Figure 6. The 2×2 cm² radiator is simulated and optimized. The results show that when the flow rate is less than 1 L/min, the total pressure drop is less than 100 kPa, the total thermal resistance is 0.087 K·cm² /W, and the maximum cooling capacity reaches 750 W/cm². The difference between inlet temperature and chip temperature is 65 K.

In 2022, research group from Peking University proposed a double H-shunt manifold channel design. Embedded microfluidic cooling chips were prepared by silicon - silicon direct bonding process. The channel structure is shown in Figure 7. chips were prepared by silicon - silicon direct bonding process. The channel structure is shown in Figure 7. In a 2 x 2 cm² heat source area, using deionized water as the cooling working medium, the effective cooling of 417 W was achieved under the conditions of 35 kPa pressure drop and 612 mL/min flow. The average temperature rise of the chip is only 22.2K. They proposed a semi-fin model to study heat transfer in manifold channels with low depth-aspect ratio, and solved fin efficiency and average Nusselt number, which provided a basis for the subsequent optimization of channel structure. The manifold channel and inlet and outlet of the structure are located in the area of the heat source chip, which can realize the compact cooling scheme, and is more suitable for embedded cooling of large area chip.

The straight passage has the simplest structure and fewer parameters for optimization design. Therefore, in the early stage of the development of embedded microfluid cooling, a relatively complete study has been carried out. Especially in the aspect of channel structure parameter optimization, the cooling performance can be optimized under certain conditions. The fin structure in the straight passage is disconnected and designed into different shapes to realize the function of the spoiler microcolumn. Due to the damage to the stable development of the fluid boundary layer, the fluid kinetic energy is consumed, so the fluid pressure drop in the structure is large. Both channel structures have the disadvantage of large temperature rise along the flow direction, especially in large-area high-power chips, chip temperature uniformity is poor.

Although the fluidic structure can effectively improve the convective heat transfer coefficient, it is difficult to expand the heat transfer area when it is used for embedded chip cooling. To achieve more uniform cooling, a dense nozzle/recovery structure is required. Due to the limitation of manufacturing process and reliability, there are few researches on jet structure in embedded cooling.

The introduction of manifold channel realizes the segmentation of embedded micro-channel and shorens the equivalent flow length of fluid. Therefore, the pump pressure drop and pump power are reduced, and the cooling energy efficiency ratio is improved. The manifold channel can be used in embedded microfluidic cooling technology, which is inseparable from the development of silicon based MEMS processing technology. The manifold type micro-channel structure overcomes the disadvantages of large flow resistance and large temperature rise along the flow direction in micro-channel cooling, so it has more application prospects and has been studied more widely.

The typical embedded microfluid cooling system consists of pump, embedded heat sink and heat exchanger. Wherein, the pump provides the energy required for the circulation of the cooling working medium, and the embedded heat sink realizes the heat exchange from the heat source to the cooling working medium. Comparatively, the heat exchanger realizes the cooling of the cooling medium and ensures the reliable circulation of the system. Embedded microfluidic cooling uses the same pumps and heat exchangers as conventional liquid cooling.

In terms of heat transfer, there are a variety of means to enhance the performance of heat transfer in the channel, including changing the surface roughness, destroying the stable development of the fluid, secondary flow, vibration and so on. However, some of the structures are difficult to be used for embedded silicon cooling, such as wavy micro-groove and other bulk silicon processing technology is difficult to achieve the structure. Therefore, it cannot be used in embedded cooling technology.

In the embedded microfluid cooling technology introduced in this paper, thermal resistance heating is used to simulate the heat production of IC chips. In order to use embedded microfluidic cooling technology in actual IC chips, it is necessary to prepare embedded microchannel structures in IC chips. Although embedded microfluidic cooling performs better than non-embedded cooling. At present, there is no commercial embedded liquid cooling solution, because the embedded cooling processing and packaging technology of IC chips still has some problems of compatibility and reliability.

Because of the pollution sensitivity of chip manufacturing, chip foundries do not accept the MEMS process to prepare heat dissipating channels and then reprocess device circuits. Up to now, all the IC chip embedded cooling technology is to prepare the heat sink device after the chip processing. According to the process compatibility, the IC compatibility of temperature and materials should be considered in the process of secondary processing. Therefore, high temperature process and IC sensitive materials cannot be used.

Compared with traditional IC, the thermal management problem in 3D high density IC is more significant. The main reasons are the strong non-uniform power consumption in 3D space and time and the resulting serious local overheating. The low thermal conductivity of dielectric layer materials increases the interlayer thermal resistance of 3D integrated Microsystems. The equivalent thermal resistance from hot spot to hot sink is greatly increased when the cooling is not significantly improved. The thermal management problem of 3D integrated circuits is more severe than that of traditional 2D or 2.5D integrated circuits.

Many simulations provide guidance and suggestions for improving the reliability of embedded microfluidic cooling for specific channel structures. However, the correlation of all the work is not strong, so there is no systematic reliability design method at present.

Embedded cooling technology is a kind of cooling technology that introduces cooling medium into chip substrate. It has been researched for several decades. Compared with traditional remote cooling technology, embedded cooling can effectively reduce thermal conductivity resistance, avoid interface thermal resistance, and improve cooling performance. Although the channel design and packaging scheme has been iterated and updated over the years. There have also been demonstrations in real chips that demonstrate the cooling performance of the technology. However, the embedded microfluid cooling technology has not been commercialized yet. In addition to manufacturing cost factors not analyzed in this paper, the reliability of the process and use process also hinder the practical application of embedded cooling. So for now, remote cooling is still the primary solution in both the commercial and military sectors.

Embedded cooling has a higher energy efficiency ratio, although some non-embedded cooling studies have achieved power or power density values comparable to embedded cooling. Therefore, the development direction of liquid cooling technology is to set the cooling structure closer to the heat source area. In the future,3D packaging architecture is an effective way to improve transistor integration. In addition to the power problems of the system, the interlayer cooling of the chip also has to be overcome. Therefore, it is necessary to propose a collaborative design scheme of embedded microfluid cooling that is compatible with miniaturization and high-density packaging to optimize the processing cost and improve the reliability of embedded microfluid cooling technology. This will be the key research direction in the future.